Area-time tradeoffs for universal VLSI circuits

An area-universal VLSI circuit can be programmed to emulate every circuit of a given area, but at the cost of lower area-time performance. In particular, if a circuit with area-time bounds (A, T ) is emulated by a universal circuit with bounds (Au, Tu), we say that the universal circuit has blowup Au/A and slowdown Tu/T . A central question in VLSI theory is to investigate the inherent costs and tradeoffs of universal circuit designs. Prior to this work, universal designs were known for area-A circuits with O(1) blowup and O(log A) slowdown. Universal designs for the family of area-A circuits containing O( √ A1+ log A) vertices, with O(A ) blowup and O(log log A) slowdown had also been developed. However, the existence of universal circuits with O(1) slowdown and relatively small blowup was an open question. In this paper, we settle this question by designing an area-universal circuit U A with O (1/ ) slowdown and O (A ) blowup, for any value of the parameter , with 4 log log A/ log A ≤ ≤ 1. By varying , we obtain universal circuits which operate at different points in the spectrum of the slowdown-blowup tradeoff. In particular, when is chosen to be a constant, our universal circuit yields O(1) slowdown. © 2008 Elsevier B.V. All rights reserved.